SAR
Instruction: Shift value arithmetically right by specified number of bits.
SAR Value, < # > Bits
Result: Value is shifted arithmetically right by Bits.
- Value (d-field) is the register to shift arithmetically right.
- Bits (s-field) is a register or a 5-bit literal whose value is the number of bits to shift arithmetically right.
Opcode Table:
–INSTR– ZCRI –CON– –DEST– –SRC– | Z Result | C Result | Result | Clocks |
001110 001i 1111 ddddddddd sssssssss | Result = 0 | D[0] | Written | 4 |
Concise Truth Table:
In | Out | ||||||
Destination | Source | Z | C | Effects | Destination | Z | C |
$FFFF_FF9C; -100 | $0000_0001; 1 | - | - | wz wc | $FFFF_FFCE; -50 | 0 | 0 |
$FFFF_FF9C; -100 | $0000_0002; 2 | - | - | wz wc | $FFFF_FFE7; -25 | 0 | 0 |
$FFFF_FF9C; -100 | $0000_0003; 3 | - | - | wz wc | $FFFF_FFF3; -13 | 0 | 0 |
$FFFF_FFF3; -13 | $0000_0001; 1 | - | - | wz wc | $FFFF_FFF9; -7 | 0 | 1 |
$FFFF_FFF9; -7 | $0000_0001; 1 | - | - | wz wc | $FFFF_FFFC; -4 | 0 | 1 |
$FFFF_FFFC; -4 | $0000_0001; 1 | - | - | wz wc | $FFFF_FFFE; -2 | 0 | 0 |
$0000_0006; 6 | $0000_0001; 1 | - | - | wz wc | $0000_0003; 3 | 0 | 0 |
$0000_0006; 6 | $0000_0002; 2 | - | - | wz wc | $0000_0001; 1 | 0 | 0 |
$0000_0006; 6 | $0000_0003; 3 | - | - | wz wc | $0000_0000; 0 | 1 | 0 |
Explanation
SAR (Shift Arithmetic Right) shifts Value right by Bits places, extending the MSB along the way. This has the effect of preserving the sign in a signed value, thus SAR is a quick divide-by-power-of-two for signed integer values.
If the WZ effect is specified, the Z flag is set (1) if the resulting Value equals zero. If the WC effect is specified, the C flag is set equal to Value's original bit 0. The result is written to Value unless the NR effect is specified.
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