Registers

Each cog contains 16 special purpose registers for accessing I/O pins, the built-in counters and video generator, and the parameter passed at the moment the cog is launched. All of these registers are explained in the Spin Language Reference and most of the information applies to both Spin and Propeller Assembly. The following table illustrates the 16 special purpose registers, indicates where to find information, and states what details, if any, do not apply to Propeller Assembly. Each of these registers can be accessed just like any other register in the destination or source fields of instructions, except for those that are designated with a footnote of 1 or 2. These special registers can only be read via the Source field of an instruction; (1) they are not writable, or (2) they can not be used in the Destination field for a read-modify-write operation.

Registers
Register(s)	Description
DIRA, DIRB³	Direction Registers for 32-bit port A and 32-bit port B, see DIRA, DIRB and DIRA, DIRB. The optional "*[Pin(s)]" parameter does not apply to Propeller Assembly; all bits of the entire register are read/written at once, unless using the MUX*x instructions.
INA¹, INB^1,3	Input Registers for 32-bit port A and 32-bit port B (Read-Only), see INA, INB and INA, INB. The optional "*[Pin(s)]*" parameter does not apply to Propeller Assembly; all bits of the entire register are read at once.
OUTA, OUTB³	Output Registers for 32-bit port A and 32-bit port B, see OUTA, OUTB and OUTA, OUTB. The optional "*[Pin(s)]" parameter does not apply to Propeller Assembly; all bits of the entire register are read/written at once, unless using the MUX*x instructions.
CNT¹	32-bit System Counter Register (Read-Only), see CNT and CNT.
CTRA, CTRB	Counter A and Counter B Control Registers, see CTRA, CTRB and CTRA, CTRB.
FRQA, FRQB	Counter A and Counter B Frequency Registers, see FRQA, FRQB and FRQA, FRQB.
PHSA²,PHSB²	Counter A and Counter B Phase-Locked Loop Registers, see PHSA, PHSB and PHSA, PHSB.
VCFG	Video Configuration Register, see VCFG and VCFG.
VSCL	Video Scale Register, see VSCL and VSCL.
PAR¹	Cog Boot Parameter Register (Read Only), see PAR and PAR.

Note 1: For Propeller Assembly, only accessible as a source register (i.e., mov dest, source). See the Assembly language sections for PAR, CNT, and INA, INB.
Note 2: For Propeller Assembly, only readable as a source register (i.e., mov dest, source); read modify-write not possible as a destination register. See the Assembly language section for PHSA, PHSB.
Note 3: Reserved for future use.