OUTA, OUTB

Register: Output registers for 32-bit Ports A and B.

((PUBPRI))
   OUTA < [Pin(s)] >


((PUBPRI))
   OUTB < [Pin(s)] > (Reserved for future use)


Returns: Current value of output Pin(s) for Port A or B, if used as a source variable.

  • Pin(s) is an optional expression, or a range-expression, that specifies the I/O pin, or pins, to access in Port A (0-31) or Port B (32-63). If given as a single expression, only the pin specified is accessed. If given as a range-expression (two expressions in a range format; x..y) the contiguous pins from the start to end expressions are accessed.

Explanation

OUTA and OUTB are two of six registers (DIRA, DIRB, INA, INB, OUTA and OUTB) that directly affect the I/O pins. The OUTA register holds the output states for each of the 32 I/O pins in Port A; bits 0 through 31 correspond to P0 through P31. The OUTB register holds the output states for each of the 32 I/O pins in Port B; bits 0 through 31 correspond to P32 through P63.

NOTE: OUTB is reserved for future use; the Propeller P8X32A does not include Port B I/O pins so only OUTA is discussed below.

OUTA is used to both set and get the current output states of one or more I/O pins in Port A. A low (0) bit sets the corresponding I/O pin to ground. A high (1) bit sets the corresponding I/O pin VDD (3.3 volts). All the OUTA register's bits default to zero (0) upon cog startup.

Each cog has access to all I/O pins at any given time. Essentially, all I/O pins are directly connected to each cog so that there is no hub-related mutually exclusive access involved. Each cog maintains its own OUTA register that gives it the ability to set any I/O pin's output state (low or high). Each cog's output states is OR'd with that of the other cogs' output states and the resulting 32-bit value becomes the output states of Port A pins P0 through P31. The result is that each I/O pin's output state is the "wired-OR" of the entire cog collective. See I/O Pins for more information.

Note that each cog's output states are made up of the OR'd states of its internal I/O hardware (Output Register, Video Generator, etc.) and that is all AND'd with its Direction Register's states.
An I/O pin actually outputs low or high, as specified by the cog's output states, if, and only if, that pin's bit in that same cog's direction register (DIRA) is high (1). Otherwise, that cog specifies the pin to be an input and its output state is ignored.

This configuration can easily be described in the following simple rules:

  1. A pin outputs low only if all active cogs that set it to output also set it to low.
  2. A pin outputs high if any active cog sets it to an output and also sets it high.

If a cog is disabled, its direction register is treated as if were cleared to 0, causing it to exert no influence on I/O pin directions and states.

Note because of the "wired-OR" nature of the I/O pins, no electrical contention between cogs is possible, yet they can all still access I/O pins simultaneously. It is up to the application developer to ensure that no two cogs cause logical contention on the same I/O pin during run time.

Using OUTA

Set or clear bits in OUTA to affect the output state of I/O pins as desired. Make sure to also set the corresponding bits of DIRA to make that pin an output. For example:

DIRA := %00000100_00110000_00000001_11110000
OUTA := %01000100_00110000_00000001_10010000 

The DIRA line above sets the I/O pins 26, 21, 20, 8, 7, 6, 5 and 4 to outputs and the rest to inputs. The OUTA line sets I/O pins 30, 26, 21, 20, 8, 7, and 4 to high, the rest to low. The result is that I/O pins 26, 21, 20, 8, 7, and 4 output high and I/O pins 6 and 5 output low. I/O pin 30 is set to an input direction (according to DIRA) so the high in bit 30 of OUTA is ignored and the pin remains an input according to this cog.
Using the optional Pin(s) field, and the post-clear (~) and post-set (~~) unary operators, the cog can affect one I/O pin (one bit) at a time. The Pin(s) field treats the I/O pin registers as an array of 32 bits. For example:

DIRA[10]~~                       'Set P10 to output
OUTA[10]~                        'Make P10 low
OUTA[10]~~                       'Make P10 high 

The first line in the code above sets I/O pin 10 to output. The second line clears P10's output latch bit, making P10 output low (ground). The third line sets P10's output latch bit, making P10 output high (VDD).
In Spin, the OUTA register supports a special form of expression, called a range-expression, which allows you to affect a group of I/O pins at once, without affecting others outside the specified range. To affect multiple, contiguous I/O pins at once, use a range expression (like x..y) in the Pin(s) field.

DIRA[12..8]~~                    'Set DIRA12:8 (P12-P8 to output) 
OUTA[12..8] := %11001            'Set P12:8 to 1, 1, 0, 0, and 1 

The first line, "DIRA…," sets P12, P11, P10, P9 and P8 to outputs; all other pins remain in their previous state. The second line, "OUTA…," sets P12, P11, and P8 to output high, and P10 and P9 to output low.

IMPORTANT: The order of the values in a range-expression affects how it is used. For example, the following swaps the order of the range from the previous example.

DIRA[8..12]~~                    'Set DIRA8:12 (P8-P12 to output)
OUTA[8..12] := %11001            'Set OUTA8:12 to 1, 1, 0, 0, and 1

Here, DIRA bits 8 through 12 are set to high (like before) but OUTA bits 8, 9, 10, 11 and 12 are set equal to 1, 1, 0, 0, and 1, respectively, making P8, P9 and P12 output high and P10 and P11 output low.

This is a powerful feature of range-expressions, but if care is not taken it can also cause strange, unintentional results.

Normally OUTA is only written to but it can also be read from to retrieve the current I/O pin output latch states. This is ONLY the cog's output latch states, not necessarily the actual output states of the Propeller chip's I/O pins, as they can be further affected by other cogs or even this cog's other I/O hardware (Video Generator, Count A, etc.). The following assumes Temp is a variable created elsewhere:

Temp := OUTA[15..13]             'Get output latch state of P15 to P13 

The above sets Temp equal to OUTA bits 15, 14, and 13; i.e.: the lower 3 bits of Temp are now equal to OUTA15:13 and the other bits of Temp are cleared to zero.

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