TEST
Instruction: Bitwise AND two values to affect flags only.
TEST Value1, < # > Value2
Result: Optionally, zero-result and parity of result is written to the Z and C flags.
- Value1 (d-field) is the register containing the value to bitwise AND with Value2.
- Value2 (s-field) is a register or a 9-bit literal whose value is bitwise ANDed with Value1.
Opcode Table:
–INSTR– ZCRI –CON– –DEST– –SRC– | Z Result | C Result | Result | Clocks |
011000 000i 1111 ddddddddd sssssssss | D = 0 | Parity of Result | Not Written | 4 |
Concise Truth Table:
In | Out | ||||||
Destination | Source | Z | C | Effects | Destination1 | Z | C |
$0000_000A; 10 | $0000_0005; 5 | - | - | wr wz wc | $0000_0000; 0 | 1 | 0 |
$0000_000A; 10 | $0000_0007; 7 | - | - | wr wz wc | $0000_0002; 2 | 0 | 1 |
$0000_000A; 10 | $0000_000F; 15 | - | - | wr wz wc | $0000_000A; 10 | 0 | 0 |
1 Destination is not written unless the WR effect is given. NOTE: the TEST instruction with a WR effect is an AND instruction.
Explanation
TEST is similar to AND except it doesn't write a result to Value1; it performs a bitwise AND of the values in Value1 and Value2 and optionally stores the zero-result and parity of the result in the Z and C flags.
If the WZ effect is specified, the Z flag is set (1) if Value1 AND Value2 equals zero. If the WC effect is specified, the C flag is set (1) if the result contains an odd number of high (1) bits.
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