Instruction: Bitwise AND a value with the NOT of another to affect flags only.

TESTN Value1, < # > Value2

Result: Optionally, zero-result and parity of result is written to the Z and C flags.

Value1 (d-field) is the register containing the value to bitwise AND with !Value2.
Value2 (s-field) is a register or a 9-bit literal whose value is inverted (bitwise NOT) and bitwise ANDed with Value1.

Opcode Table:

–INSTR– ZCRI –CON– –DEST– –SRC–	Z Result	C Result	Result	Clocks
011001 000i 1111 ddddddddd sssssssss	D = 0	Parity of Result	Not Written	4

Concise Truth Table:

In					Out
Destination	Source	Z	C	Effects	Destination¹	Z	C
$F731_125A; -147,778,982	$FFFF_FFFA; -6	-	-	wr wz wc	$0000_0000; 0	1	0
$F731_125A; -147,778,982	$FFFF_FFF8; -8	-	-	wr wz wc	$0000_0002; 2	0	1
$F731_125A; -147,778,982	$FFFF_FFF0; -16	-	-	wr wz wc	$0000_000A; 10	0	0

¹ Destination is not written unless the WR effect is given. NOTE: the TESTN instruction with a WR effect is an ANDN instruction.

Explanation

TESTN is similar to ANDN except it doesn't write a result to Value1; it performs a bitwise AND NOT of Value2 into Value1 and optionally stores the zero-result and parity of the result in the Z and C flags.

If the WZ effect is specified, the Z flag is set (1) if Value1 AND NOT Value2 equals zero. If the WC effect is specified, the C flag is set (1) if the result contains an odd number of high (1) bits.